pynq-curation/pynq-adder-add
Minimal AXI-Lite adder IP overlay (axi_adder) for PYNQ-Z1; teaching example for hand-written (non-HLS) AXI IP. By yunqu, commit ff0f31d.
Minimal AXI-Lite adder IP overlay (axi_adder) for PYNQ-Z1; teaching example for hand-written (non-HLS) AXI IP. By yunqu, commit ff0f31d.
General CNN accelerator (AXI-Lite config + AXI DMA) built for AlexNet on PYNQ-Z2; README says the AlexNet weights are untested placeholders. By Futuresxy (Wuhan Univ.), tag cnn-accelerator-v1.0.0.
General CNN accelerator, generic layer configuration for single conv/pool/FC tests on PYNQ-Z2 (Accelerator_bigger.bit). By Futuresxy (Wuhan Univ.), tag cnn-accelerator-v1.0.0.
General CNN accelerator configured for LeNet MNIST handwritten-digit recognition on PYNQ-Z2 (Accelerator_number.bit). By Futuresxy (Wuhan Univ.), tag cnn-accelerator-v1.0.0.
Handwritten math calculator: CNN recognises digits/operators from an SD image or USB camera and evaluates the expression, on PYNQ-Z2 (SEU-Xilinx Summer School 2020). By Microdent, commit 33b53e7.
MNIST classifier streaming accelerator with 1-bit quantisation, batch 64 (mnist_hw + two AXI DMAs), about 10x faster than numpy, on PYNQ-Z2. By junwha, commit a0acd72.
PYNQ overlay tutorial example 1: single AXI-Lite scalar adder IP, for PYNQ-Z1 (hwh BOARD=arty-z7-20, same xc7z020clg400). By PeterOgden; repo archived (last push 2021-12-15), commit 432adbb.
PYNQ overlay tutorial example 2: adder IP plus const_multiply hierarchy (multiplier + AXI DMA) for the driver demo, PYNQ-Z1. By PeterOgden; repo archived (last push 2021-12-15), commit 432adbb.
Minimal AXI-Stream adder IP overlay (axis_adder + AXI DMA) for PYNQ-Z1; teaching example for hand-written (non-HLS) AXI IP. By yunqu, commit ff0f31d.
C4.5 decision-tree inference overlay (3-stage pipelined tree IP) for PYNQ-Z1; tree parameters configurable from Python. By yunqu, commit 21a6050.
PYNQ-Spectroscopy DigitalRef overlay: ZCU104 spectrometer build with digital reference / DDS mux for the portable NMR/MRI system. By unizhibin (Univ. Stuttgart IIS), commit 7c49c31.
PYNQ-Spectroscopy HVNMR overlay: ZCU104 NMR spectrometer driving the group's high-voltage NMR transceiver ASIC (pulse generator, ADC/DAC, tracing). By unizhibin (Univ. Stuttgart IIS), commit 7c49c31.
PYNQ-Spectroscopy MRI_Rev3 overlay: ZCU104 spectrometer build with MRI gradient control for the portable NMR/MRI system. By unizhibin (Univ. Stuttgart IIS), commit 7c49c31.
Unified NMR/MRI control platform v3.6 overlay (Unified_NMR_v1.6_rev2_mod3.bit) for ZCU104: pulse sequencer, RX/TX, shimming; GUI package src_v3_6. By unizhibin (Univ. Stuttgart IIS), commit 7c49c31.
PYNQ-Torch regression example: HLS accelerator for the PyTorch backward pass (custom_backward) on PYNQ-Z1, PYNQ 2.4 + PyTorch 1.2. By manoharvhr, tag v1.1.
PYNQ-Torch SampleRNN GRU accelerator overlay (sampleRNN_GRU_unroll.bit) for PYNQ-Z1; hwh taken from the Vivado project, bit bytes identical to its impl_1 output. By manoharvhr, tag v1.1.
PYNQ-Torch SampleRNN weight-norm accelerator overlay (compute_weight_new_64641.bit) for PYNQ-Z1; hwh from the Vivado project, bit identical to its impl_1 output. By manoharvhr, tag v1.1.
PYNQ AXI DMA tutorial overlay (DMA loopback example) for PYNQ-Z2, Vivado 2020.1; companion to the PYNQ DMA video tutorial. By cathalmccabe, commit f4a11dc.
PYNQ tutorial overlay: HLS AXI-Stream IP ('example') fed by AXI DMA on PYNQ-Z2, Vivado 2020.2. By cathalmccabe, commit f4a11dc.
PYNQ tutorial overlay: HLS IP with an AXI master (m_axi) memory interface plus AXI interrupt controller on PYNQ-Z2, Vivado 2020.1. By cathalmccabe, commit f4a11dc.
PYNQ tutorial overlay: Zynq PS GPIO (EMIO) routed to PL pins on PYNQ-Z2, Vivado 2020.1; companion to the PS GPIO video tutorial. By cathalmccabe, commit f4a11dc.
Canny edge-detection pipeline (Sobel, non-maximum suppression, hysteresis HLS IPs) fed by AXI DMA on PYNQ-Z2; Politecnico di Torino student project. By leonardopennino, commit 5f2bea9.
4096-channel 2/1 oversampled 4 GHz polyphase filterbank (OPFB) channelizer with RF data converter loopback and capture DMA for RFSoC4x2. By MazinLab (UCSB), tag v3.0.
PicoRV32 RISC-V soft-processor overlay, AXI variant (PS-shared BRAM via AXI, AXI INTC) for PYNQ-Z1 / PYNQ 2.1+. By drichmond (UC Regents), commit 9eba461.
PicoRV32 RISC-V soft-processor overlay, BRAM-only memory variant (PicoBramBridge, AXI INTC) for PYNQ-Z1 / PYNQ 2.1+. By drichmond (UC Regents), commit 9eba461.
RFSoC Spectrum Analyser Module: real-time spectrum analyser overlay with Voila dashboard for RFSoC2x2 / RFSoC4x2 / ZCU111 (ZCU208 build skipped: board not in DB). By strath-sdr, tag v0.5.0.